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Module port

Module port 

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Typed, back-pressure-aware ports used to compose components and models.

Ports are the main runtime boundary between simulation blocks. An OutPort<T> connects to an InPort<T> through shared PortState<T>, and the type parameter is part of the contract: only ports carrying the same simulation object type can be connected.

Construct components and models, connect every required port, and then start the engine. An unconnected port is reported when the active task calls get, start_get, put, or try_put, so a “not connected” error should be treated as a topology construction bug rather than as ordinary simulation behavior.

Data transfer is flow controlled. put waits until the receiver accepts the value, get waits until a value is available, and try_put asynchronously waits until a receiver is waiting in get or start_get without transferring a value. start_get / finish_get support protocols that need to observe a value before releasing the sender.

Modules§

monitor
Monitor for port

Structs§

InPort
OutPort
PortGet
PortPut
PortStartGet
PortState
PortTryPut

Type Aliases§

PortGetResult
PortPutResult
PortStartGetResult
PortStateResult
PortTryPutResult